VLSI-cell placement technique for Architecture of Field Programmable Gate Array (FPGA) design

Authors : Avnesh VERMA, Sunil DHINGRA, M. K. SONI

Pages : 327-336

View : 27 | Download : 4

Publication Date : 0000-00-00

Article Type : Research Paper

Abstract :The Field Programmable Gate Array insert ignore into journalissuearticles values(FPGA); is an on field programmable device which can be designed for different applications. Various types of software are available for its synthesis. The cell placement depends upon the designing and programming languages used for FPGA. In this paper cell placement technique of FPGA architecture is analyzed for the application of Space Vector Pulse Width Modulation insert ignore into journalissuearticles values(SVPWM); technique used in speed control of an induction motor. The modulation pulses are produced due to the various components activated and their interconnection in Configurable Logic Blocks insert ignore into journalissuearticles values(CLBs);. Few of its components are so analyzed to find out the reason for their desired output response. This survey has also been conducted to find the correlation of LUTs and formulation of output.
Keywords : Field Programmable Gate Array FPGA, , Space Vector Pulse Width Modulation SVPWM, , Configurable Logic Blocks CLBs