NVRH-LUT: A nonvolatile radiation-hardened hybrid MTJ/CMOS-based look-up table for ultralow power and highly reliable FPGA designs

Authors : Vahid JAMSHIDI

Pages : 4486-4501

View : 8 | Download : 4

Publication Date : 0000-00-00

Article Type : Research Paper

Abstract :Complementary metal oxide semiconductor insert ignore into journalissuearticles values(CMOS); downscaling leads to various challenges, such as high leakage current and increase in radiation sensitivity. To solve such challenges, hybrid MTJ/CMOS technology-based design has been considered as a very promising approach thanks to the high speed, low power, good scalability, and full compatibility of magnetic tunnel junction insert ignore into journalissuearticles values(MTJ); devices with CMOS technology. One important application of MTJs is the efficient utilization in building nonvolatile look-up tables insert ignore into journalissuearticles values(NV-LUTs); used in reconfigurable logic. However, NV-LUTs face severe reliability issues in nanotechnology due to the increasing process variations, reduced supply voltage, and high energetic particle strike at sensitive nodes of CMOS circuits. This paper proposes a nonvolatile radiation-hardened look-up table insert ignore into journalissuearticles values(NVRH-LUT); for advanced reconfigurable logic. Compared with previous works, the proposed NVRH-LUT is fully robust against single-event upsets and also single-event double-node upsets that are among the main reliability-challenging issues for NV-LUTs. Results have shown that NVRH-LUT not only provides increasing reliability and reduced bit error rate but also offers low delay and low energy consumption.
Keywords : Magnetic tunnel junction, nonvolatility, hybrid MTJ CMOS logic circuits, radiation immunity, soft error, single event upset, single event double node upset